The present invention relates to a voltage regulator (hereinafter referred to as "V/R") which is capable of preventing a large current from flowing in a power supply when the V/R starts (this is a state in which an input voltage is applied to the V/R).
As a conventional V/R, there has been known a V/R shown in a circuit diagram of FIG. 6. That is, the conventional V/R is made up of a V/R control circuit formed of an error amplifier circuit 13 that compares and amplifies a differential voltage between a reference voltage Vref of a reference voltage circuit 10 and a voltage at a node of bleeder resistors 11 and 12 that divide a voltage (hereinafter referred to as "output voltage") Vout of an output terminal 5 of the V/R, and an output transistor 14. Assuming that an output voltage of the error amplifier 13 is Verr, an output voltage of the reference voltage circuit 10 is Vref and a voltage at the node between the bleeder resistors 11 and 12 is Va, if Vref&gt;Va, Verr becomes low, but if Vref&lt;Va, Verr becomes high.
When Verr becomes low, a voltage between the gate and the source of the output transistor 14 becomes large because the output transistor 14, in this case, is a p-channel MOS transistor, and the on-resistance becomes low so that the output voltage Vout rises, but conversely when Verr becomes high, the on-resistance of the output transistor 14 is made high so that the output voltage is lowered, to hold the output voltage Vout to a given voltage.
In general, in the V/R, since the output voltage Vout is lower than a desired voltage at the start of starting operation, the output Verr of the error amplifier 13 becomes a minimum value in order to make the output voltage high, to control the on-resistance of the output transistor 14 so as to be very small.
However, the conventional V/R suffers from a problem in that a large current flows in a power supply at the start of operation to cause damage to the power supply or the output transistor.
Therefore, in order to solve this problem with the conventional V/R, an object of the present invention is to clamp the output voltage of an error amplifier at the time of starting a V/R to inhibit the on-resistance of an output transistor from becoming very small, thereby suppressing a current to a power supply and a current to the output transistor at the time of starting the V/R.